In digital data communication systems, it is common practice to provide a communication bus, shared in common by a plurality of data transceiver units, over which messages are conveyed among the users of the system. These users may include one or more processor units, memory, peripherals, intrabus interface units, etc. In order that messages may be sent without interfering with one another, the system is usually provided with a bus management arrangement which provides an orderly manner of permitting access to and use of the bus by the various units that are coupled to it. Among various schemes that have been proposed for this purpose are polling arrangements, wherein a preassigned central controller polls the individual units in a predetermined order, in order to determine if any unit desires to use the bus. The central controller grants access to the bus to the respective users of the bus only when that respective user is polled. In another type of system, rather than use a central polling station, a user access scheme is integrated among the users of the bus, whereby each unit is assigned a predetermined priority, usually hardwired in each unit, and access to the bus is passed from one user to the next along the bus, from the highest preassigned priority device to the lowest preassigned priority device. In yet another type of system, either a central bus controller, or each unit along the bus, contains a priority resolution or bus arbitration subsystem which allocates use of the bus to the user having the highest priority among a plurality of units making concurrent requests for use of the bus. In these types of schemes, priority resolution may be accomplished by scanning a table of requests in a predetermined order and allocating use to the table location having highest priority, or providing an access lock-out scheme, whereby a higher priority unit effectively prevents or locks out others of lower priority from gaining access to the bus.
Unfortunately, proposals such as those described briefly above suffer from a number of disadvantages. Those systems which employ a central controller require extra hardware, and the extra time involved in polling or scanning techniques decreases the speed of the system. Similarly, simply incorporating some sort of priority resolving device into each unit along the bus has not in and of itself been particularly attractive since, as pointed out above, extra lock out logic integrated among the users of the bus is required, and bus access is still effected basically in a serial or chain fashion. For examples of priority resolution schemes of the type explained above, attention may be directed to the following U.S. Patents: Appelt, U.S. Pat. No. 3,886,524; Miu et al U.S. Pat. No. 4,050,097; Keller et al U.S. Pat. No. 3,983,540; Barlow U.S. Pat. No. 4,030,075; Nakamura U.S. Pat. No. 3,710,351; McLagen et al U.S. Pat. No. 4,418,011; Hauch U.S. Pat. No. 3,629,854; Nitta et al U.S. Pat. No. 4,106,104; Ledeen et al U.S. Pat. No. 3,742,148; Suzuki et al U.S. Pat. No. 4,151,592; Yamada U.S. Pat. No. 3,813,651; Schlotlerer U.S. Pat. No. 4,130,864; Valassis U.S. Pat. No. 3,959,759; Kronies et al U.S. Pat. Nos. 3,919,692 3,919,692; Ying U.S. Pat. No. 4,150,429; Seichter et al U.S. Pat. No. 3,456,244; Duke et al U.S. Pat. No. 4,038,644; Driscoll U.S. Pat. No. 3,445,822; and Ito, U.S. Pat. No. 3,978,451.